7.3 VDD-AON Power Domain Overview

The PIC32CX-BZ3 VDD-AON power domain block consists of the following modules:
  • SOSC’s analog component acts as a secondary oscillator and uses a low-power 32.768 kHz crystal oscillator for accurate time keeping.
  • For context saving, use the Extreme Deep Sleep (XDS) system controller with the semaphore.
  • The Deep Sleep Regulator (ULPVREG) is an ultra-low-power regulator that provides power during deep sleep modes and/or retention power to the rest of the system in various modes of operation. VDDBKUPCORE is the voltage output.
  • Low Power RC oscillator (LPRC) operates at a nominal frequency of 32.768 KHz.