7.1 Block Diagram

The following figure shows the detailed view of the power subsystem on the PIC32CX-BZ3 device.
Figure 7-1. Power Subsystem Block Diagram
The power domains of PIC32CX-BZ3 SoC are as follows:
  • VDD – 1.9-3.6V, Main Supply powering VDDIO, FLASH_VDD, AVDD, PMU_VDDIO, PMU_VDDP. All other supplies are derived from VDD with or without filtering.
    • VDDIO
      • 1.9-3.6V, powering the Always ON (AON ), PMU Controller, AN/GPIO, INT0/NMCLR, BKUP
    • FLASH_AVDD
      • 1.9V to 3.6V, filtered version of VDD (powering the Flash)
    • AVDD
      • 1.9V to 3.6V, filtered version of VDD for system analog functionality
    • PMU_VDDIO
      • 1.9-3.6V, filtered version of VDD (powering the PMU sub-system)
    • PMU_VDDP
      • 1.9-3.6V, filtered version of VDD (powering the PMU sub-system)
  • GND
    • Common GND for digital, analog and RF sub-systems
Other power supply pins as follows:
  • CLDO_OUT (1.2V ± 5%)
    • Output pin for the internal voltage regulator for decoupling, do not use this pin as an external power supply source
    • CLDO is powered with 1.35V ± 5% from the combination of DC-DC, MLDO and external board filtering
    • VDDCORE is derived from CLDO_OUT
    • Powers the core, memories and peripherals
  • PMU_BK_LX
    • Pin for connecting the inductor for the internal switching regulator
  • PMU_MLDO_OUT (1.35V ± 3.7%)
    • 1.35V PMU output pin. This is the shared output pin for both MLDO and the DC-DC converter
    • MLDO_OUT powers the internal LDO’s in the Bluetooth/Zigbee subsystem

For decoupling recommendations for the different power supplies, refer to the schematic checklist.