4.1.3.3 Communication Interruptions
In the event of an interruption in a protocol sequence, the sequence can
be resumed from the point of interruption if the elapsed time of inactivity (where SI/O is
idle) is less than the maximum tBIT time. The maximum allowable
value will differ if the device is in High-Speed mode or Standard Speed mode (see Setting the Device
Speed).
Note: The interruption of
protocol must not occur during a write sequence immediately after a logic
‘
For systems that cannot accurately monitor the
location of interrupts, it is recommended to ensure that a minimum interruption time be
observed consistent with the longest busy operation of the device (tWR).
Communicating with the device during an internal write cycle by driving SI/O low could
cause the byte(s) being written to become corrupted and must be avoided. The behavior of
the device during a write cycle is described in more detail in Device Behavior During Internal Write Cycle.0’ (ACK response) when sending data to be written to the device. In
this case, the interruption will be interpreted as a Stop condition and will cause an
internal write cycle to begin. The device will be busy for tWR time and will
not respond to any commands.If the sequence is interrupted for longer than the maximum tBIT, the host must wait at least the minimum tHTSS before continuing. By waiting the minimum tHTSS time, a new Start condition is created and the device is ready to receive a new command. It is recommended that the host start over and repeat the transaction that was interrupted midstream.