24.9.2 Control B in Clock/Calendar mode (CTRLA.MODE=2)
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | CTRLB |
| Offset: | 0x2 |
| Reset: | 0x0000 |
| Property: | PAC Write-Protection, Enable-Protected |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SEPTO | ACTF[2:0] | DEBF[2:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DMAEN | RTCOUT | DEBASYNC | DEBMAJ | GP2EN | GP0EN | ||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 15 – SEPTO Separate Tamper Outputs
| Value | Description |
|---|---|
| 0 | IN[n] is compared tp OUT[0] (backward-compatible). |
| 1 | IN[n] is compared tp OUT[n]. |
Bits 14:12 – ACTF[2:0] Active Layer Frequency
| Value | Name | Description |
|---|---|---|
| 0x0 | DIV2 | CLK_RTC_OUT = CLK_RTC / 2 |
| 0x1 | DIV4 | CLK_RTC_OUT = CLK_RTC / 4 |
| 0x2 | DIV8 | CLK_RTC_OUT = CLK_RTC / 8 |
| 0x3 | DIV16 | CLK_RTC_OUT = CLK_RTC / 16 |
| 0x4 | DIV32 | CLK_RTC_OUT = CLK_RTC / 32 |
| 0x5 | DIV64 | CLK_RTC_OUT = CLK_RTC / 64 |
| 0x6 | DIV128 | CLK_RTC_OUT = CLK_RTC / 128 |
| 0x7 | DIV256 | CLK_RTC_OUT = CLK_RTC / 256 |
Bits 10:8 – DEBF[2:0] Debounce Frequency
| Value | Name | Description |
|---|---|---|
| 0x0 | DIV2 | CLK_RTC_DEB = CLK_RTC / 2 |
| 0x1 | DIV4 | CLK_RTC_DEB = CLK_RTC / 4 |
| 0x2 | DIV8 | CLK_RTC_DEB = CLK_RTC / 8 |
| 0x3 | DIV16 | CLK_RTC_DEB = CLK_RTC / 16 |
| 0x4 | DIV32 | CLK_RTC_DEB = CLK_RTC / 32 |
| 0x5 | DIV64 | CLK_RTC_DEB = CLK_RTC / 64 |
| 0x6 | DIV128 | CLK_RTC_DEB = CLK_RTC / 128 |
| 0x7 | DIV256 | CLK_RTC_DEB = CLK_RTC / 256 |
Bit 7 – DMAEN DMA Enable
| Value | Description |
|---|---|
| 0 | Tamper DMA request is disabled. Reading TIMESTAMP has no effect on INTFLAG.TAMPER. |
| 1 | Tamper DMA request is enabled. Reading TIMESTAMP will clear INTFLAG.TAMPER. |
Bit 6 – RTCOUT RTC Out Enable
| Value | Description |
|---|---|
| 0 | The RTC active layer output is disabled. |
| 1 | The RTC active layer output is enabled. |
Bit 5 – DEBASYNC Debouncer Asynchronous Enable
| Value | Description |
|---|---|
| 0 | The tamper input debouncers operate synchronously. |
| 1 | The tamper input debouncers operate asynchronously. |
Bit 4 – DEBMAJ Debouncer Majority Enable
| Value | Description |
|---|---|
| 0 | The tamper input debouncers match three equal values. |
| 1 | The tamper input debouncers match majority two of three values. |
Bit 1 – GP2EN General Purpose 2 Enable
| Value | Description |
|---|---|
| 0 | COMP1 compare function enabled. GP2/GP3 disabled. |
| 1 | COMP1 compare function disabled. GP2/GP3 enabled. |
Bit 0 – GP0EN General Purpose 0 Enable
| Value | Description |
|---|---|
| 0 | COMP0/1 compare function enabled. GP0/GP1 disabled. |
| 1 | COMP0/1 compare function disabled. GP0/GP1 enabled. |