24.9.9 Frequency Correction
Note: CLK_RTC_CNT = [CLK_RTC / 2(PRESCALAR-1)] * (1 ± [((8192*128)+FREQCORR.VALUE) /
(8192*128)])
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | FREQCORR |
Offset: | 0x14 |
Reset: | 0x00 |
Property: | PAC Write-Protection, Write-Synchronized |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SIGN | VALUE[6:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – SIGN Correction Sign
Value | Description |
---|---|
0 | The correction value is positive, i.e., frequency will be decreased. |
1 | The correction value is negative, i.e., frequency will be increased. |
Bits 6:0 – VALUE[6:0] Correction Value
Value | Description |
---|---|
0 | Correction is disabled and the RTC frequency is unchanged. |
1 - 127 | The RTC frequency is adjusted according to the value. |