24.9.12 Alarm Mask in Clock/Calendar mode (CTRLA.MODE=2)
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | MASK |
Offset: | 0x24 |
Reset: | 0x00 |
Property: | PAC Write-Protection, Write-Synchronized |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SEL[2:0] | |||||||||
Access | R/W | R/W | R/W | ||||||
Reset | 0 | 0 | 0 |
Bits 2:0 – SEL[2:0] Alarm Mask Selection
These bits define which bit groups of ALARM are valid.
Value | Name | Description |
---|---|---|
0x0 | OFF | Alarm Disabled |
0x1 | SS | Match seconds only |
0x2 | MMSS | Match seconds and minutes only |
0x3 | HHMMSS | Match seconds, minutes, and hours only |
0x4 | DDHHMMSS | Match seconds, minutes, hours, and days only |
0x5 | MMDDHHMMSS | Match seconds, minutes, hours, days, and months only |
0x6 | YYMMDDHHMMSS | Match seconds, minutes, hours, days, months, and years |
0x7 | - | Reserved |