31.2.4 Flash Architecture
Each Flash partition is built up of several pages, also called sectors. The controller works with panels made from 4KB pages with each page containing 4 rows of Flash data. A row is the largest selectable region for contiguous programming of Write Words. A Row contains 128 Write Words.
A page of Flash is the smallest unit of memory that can be erased in a single operation. A panel’s Program Flash Memory (PFM) space can also be erased in a single operation. All other erases use multiple operations.
A Write Word is the only unit of memory that can be programmed at a time. All other programming operations are made up of several contiguous Write Word Program operations. The FCW supports:
- Row Write: Write Word by Write Word programming until the whole Row is written. Data is read by the FCW from System SRAM.
- Quad Write: The FCW performs 4 writes of data from holding registers
- Single Write: The FCW performs one write of data from holding register(s)
Program Flash Memory (PFM)
PFM is the largest section of Flash memory. It is where the main application code resides. When a series of parts have the same feature but different Flash size, the PFM is the only partition that changes size.
Each panel contains PFM. The natural order is for Panel 1 PFM to exist in the lower address range and Panel 2 PFM to exist in the upper address range. The order in which each PFM exist in the Flash memory space can be controlled by software. The PFM address range is contiguous across both panels.
Dual panel systems support Live Update which allows reading from one panel while write to the other. It does not matter which of the logical regions are being accessed as long as they are in different panels.
Boot Flash Memory (BFM)
Boot Flash Memory is meant to support sophisticated boot loaders and therefore have 16 pages in each panel’s BFM.
PIC32C devices have a Boot ROM to control the loading of configuration and to provide a root of trust for secure boot. When the Boot ROM is finished it sets up the CPU to start execution from the base of BFM.
With a dual panel system, each panel has BFM. The BFM can be used in either Dual Boot or Single Boot. Dual Boot designates each panel’s BFM as a boot source. This allows the safe updating of one boot image while the other image stays intact. Single boot allows the boot image to span both panel’s BFM space providing a larger boot code space.
Configuration Flash Memory (CFM)
CFM contains eight pages (four pages in each panel) dedicated to configuration of the device. (See the following table.) These pages have hardware-imposed restrictions on their usage. They are not for code and may not be accessible after the device is protected.
Three pages contain factory calibration data including the unique ID of the device (Cal-OTP, Cal-Backup, and Test). These pages are cannot be written or erased.
The Debug Access Level Configuration page (DAL CFG) holds the selected allowable access provided to the debug host. This page can only be written via the SDAL command. It cannot be erased by a Page Erase. The Boot ROM is allowed to issue SDAL commands in order to restore DAL to the appropriate level.
The Boot Configuration page (Boot CFG) contains pre-boot options to be configured by the Boot ROM. This page can be read protected and write/erase protected by the Flash system.
The User-OTP page implements a flash based One Time Programmable regions. It is always erase protected by hardware such that its content survives a Chip Erase operation. It is intended to store calibration values for external devices but is fully user defined.
The User Configuration page (User CFG) stores pre-boot options that have a different protection model than Boot CFG. This page can be write/erase locked.
The second panel’s CFM contains additional pages to support dual boot. Boot CFG 2 and User CFG 2 allow safe updates of configuration when also updating application code in PFM or boot code in BFM.
| Panel: | Address: | Size: | Contents: | Notes: | |
|---|---|---|---|---|---|
| Start: | End: | ||||
| 1 | 0x0A00_0000 | 0x0A00_0FFF | 4 KByte | User CFG-1 | |
| 1 | 0x0A00_1000 | 0x0A00_1FFF | 4 KByte | User OTP-1 | |
| 1 | 0x0A00_2000 | 0x0A00_2FFF | 4 KByte | BOOT CFG-1 | |
| 1 | 0x0A00_3000 | 0x0A00_3FFF | 4 KByte | RSVD | No access. |
| 1 | 0x0A00_4000 | 0x0A00_4FFF | 4 KByte | DAL CFG | |
| 1 | 0x0A00_5000 | 0x0A00_5FFF | 4 KByte | TEST | Cannot be written or erased. |
| 1 | 0x0A00_6000 | 0x0A00_6FFF | 4 KByte | CAL-Backup | Cannot be written or erased. |
| 1 | 0x0A00_7000 | 0x0A00_7FFF | 4 KByte | CAL-OTP | Cannot be written or erased. |
| 2 | 0x0A00_8000 | 0x0A00_8FFF | 4 KByte | User CFG-2 | |
| 2 | 0x0A00_9000 | 0x0A00_9FFF | 4 KByte | User OTP-2 | |
| 2 | 0x0A00_A000 | 0x0A00_AFFF | 4 KByte | BOOT CFG-2 | |
| 2 | 0x0A00_B000 | 0x0A00_BFFF | 4 KByte | RSVD | No access. |
| 2 | 0x0A00_C000 | 0x0A00_CFFF | 4 KByte | RSVD | |
| 2 | 0x0A00_D000 | 0x0A00_DFFF | 4 KByte | RSVD | |
| 2 | 0x0A00_E000 | 0x0A00_EFFF | 4 KByte | RSVD | |
| 2 | 0x0A00_F000 | 0x0A00_FFFF | 4 KByte | RSVD | |
|
Note: All RSVD addresses are “Address Holes” and therefore generate
a bus error back to the initiator.
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