29.7.13 Debouncer Prescaler
Note:
- This register is write protected and can only be written when CTRLA.ENABLE = 0.
- Access to this register is limited to 32-bit width. Byte level access is not allowed.
- Reserved bits must always be written as ‘0’.
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | DPRESCALER |
| Offset: | 0x34 |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection, Enable-Protected |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| TICKON | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| STATES1 | PRESCALER1[2:0] | STATES0 | PRESCALER0[2:0] | ||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 16 – TICKON Pin Sampler frequency selection
| Value | Description |
|---|---|
| 0 | The bounce sampler is using GCLK_EIC. |
| 1 | The bounce sampler is using the low frequency clock. |
Bits 3, 7 – STATESn Debouncer Number of States [n=0,1]
| Value | Description |
|---|---|
| 0 | The number of low-frequency samples is 3. |
| 1 | The number of low-frequency samples is 7. |
Bits 0:2, 4:6 – PRESCALERn Debouncer Prescaler [n=0,1]
| Value | Name | Description |
|---|---|---|
| 0x0 | F/2 | EIC clock divided by 2 |
| 0x1 | F/4 | EIC clock divided by 4 |
| 0x2 | F/8 | EIC clock divided by 8 |
| 0x3 | F/16 | EIC clock divided by 16 |
| 0x4 | F/32 | EIC clock divided by 32 |
| 0x5 | F/64 | EIC clock divided by 64 |
| 0x6 | F/128 | EIC clock divided by 128 |
| 0x7 | F/256 | EIC clock divided by 256 |