29.7 Register Summary

For descriptions and definitions of both Register and bitfield properties, refer to Register Properties.

OffsetNameBit Pos.76543210
0x00CTRLA7:0   CKSEL  ENABLESWRST
0x01NMICTRL7:0   NMIASYNCHNMIFILTENNMISENSE[2:0]
0x02NMIFLAG7:0       NMI

0x03

Reserved         
0x04SYNCBUSY31:24        
23:16        
15:8        
7:0      ENABLESWRST
0x08EVCTRL31:24        
23:16        
15:8EXTINTEO[15:8]
7:0EXTINTEO[7:0]
0x0CINTENCLR31:24        
23:16        
15:8EXTINT[15:8]
7:0EXTINT[7:0]
0x10INTENSET31:24        
23:16        
15:8EXTINT[15:8]
7:0EXTINT[7:0]
0x14INTFLAG31:24        
23:16        
15:8EXTINT[15:8]
7:0EXTINT[7:0]
0x18ASYNCH31:24        
23:16        
15:8ASYNCH[15:8]
7:0ASYNCH[7:0]
0x1CCONFIG031:24FILTEN7SENSE7[2:0]FILTEN6SENSE6[2:0]
23:16FILTEN5SENSE5[2:0]FILTEN4SENSE4[2:0]
15:8FILTEN3SENSE3[2:0]FILTEN2SENSE2[2:0]
7:0FILTEN1SENSE1[2:0]FILTEN0SENSE0[2:0]
0x20CONFIG131:24FILTEN15SENSE15[2:0]FILTEN14SENSE14[2:0]
23:16FILTEN13SENSE13[2:0]FILTEN12SENSE12[2:0]
15:8FILTEN11SENSE11[2:0]FILTEN10SENSE10[2:0]
7:0FILTEN9SENSE9[2:0]FILTEN8SENSE8[2:0]

0x24

...

0x2F

Reserved         
0x30DEBOUNCEN31:24        
23:16        
15:8DEBOUNCEN[15:8]
7:0DEBOUNCEN[7:0]
0x34DPRESCALER31:24        
23:16       TICKON
15:8        
7:0STATES1PRESCALER1[2:0]STATES0PRESCALER0[2:0]
0x38PINSTATE31:24        
23:16        
15:8PINSTATE[15:8]
7:0PINSTATE[7:0]