13.6.12 Interrupt Enable Set
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | INTENSET |
Offset: | 0x35 |
Reset: | 0x00 |
Property: | Write-Protected |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
CKRDY | |||||||||
Access | R/W | ||||||||
Reset | 0 |
Bit 0 – CKRDY Clock Ready Interrupt Enable
Writing a zero to this bit has no effect.
Writing a one to this bit will set the Clock Ready Interrupt Enable bit and enable the Clock Ready interrupt.
Value | Description |
---|---|
0 | The Clock Ready interrupt is disabled. |
1 | The Clock Ready interrupt is enabled. |