14.7.13 DFLL48M Synchronization

Table 14-18. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
R Readable bit HC Cleared by Hardware(Grey cell)Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit
Name: DFLLSYNC
Offset: 0x30
Reset: 0x00
Property: Write-Protected

Bit 76543210 
 READREQ        
Access W 
Reset 0 

Bit 7 – READREQ Read Request

To be able to read the current value of DFLLVAL in Closed-Loop mode, this bit should be written to one. The updated value is available in DFLLVAL when PCLKSR.DFLLRDY is set.