18.1 Analog Peripheral Manager Control

The Analog Peripheral Manager (APM) utilizes an integrated 16-bit timer with a 16-bit prescaler to control the frequency in which analog peripherals will be activated, essentially enabling the analog module without waking up the CPU. The APM period and prescaler are configured using the APMPER and APMPRE registers, respectively. This 16-bit timer can be clocked using a range of sources such as the LFINTOSC (31 kHz), SOSC (32.768 kHz), ADCRC, or an external clock source connected to a dedicated PPS input pin. A list of the available APM clock sources can be found in the APMCLK register.

The Analog Peripheral Manager allows modules to be grouped into two different Start (S1 / S2) and End times (E1 / E2) and provides the flexibility to select which analog modules will start and end in both instances. Each of the Start and End times have their own dedicated peripheral control registers called as APMPERS1 (S1) / APMPERS2 (S2) and APMPERE1 (E1) / APMPERE2 (E2).

The peripheral start registers contain individual start bits for all of the available analog peripherals on the device that can be controlled using the APM. When the start bit for a particular peripheral is set in either of the APM peripheral start registers, that peripheral will be enabled when the corresponding event occurs. Similarly, the peripheral end registers contain individual end bits for all of the available analog peripherals. If one of the end bits in either of the APM peripheral end registers is set, that peripheral will be disabled when the corresponding event occurs.