3.2.6.2 PIOB Bank

The PIOB bank is mainly used for the SPI interface, QSPI and SD Card over power rails VDDIOP0, VDDQSPI1/0 and VDDSDMMC1, respectively.

The following schematic shows the PIOB bank distribution.

Figure 3-16. SAMA7G5 PIOB Bank Distribution

The following table describes each PIOB bank function.

Table 3-6. SAMA7G5 PIOs Pin Assignment and Signal Description
PIOPower RailFunctionSignal Description
PB0VDDIOP0SPDIF_RXSPDIF receive data
PB1VDDIOP0SPDIF_TXSPDIF transmit data
PB2VDDIOP0PB2Power enable USB host port A
PB3VDDIOP0FLEXCOM11_IO0mikroBUS 1 or mikroBUS 2 SPI MOSI line
PB4VDDIOP0FLEXCOM11_IO1mikroBUS 1 or mikroBUS 2 SPI MISO line
PB5VDDIOP0FLEXCOM11_IO2mikroBUS 1 or mikroBUS 2 SPI CLOCK line
PB6VDDIOP0FLEXCOM11_IO3mikroBUS 1 SPI Chip Select line
PB7VDDIOP0FLEXCOM11_IO4mikroBUS 2 SPI Chip Select line
PB8VDDIOP0PB8Red LED control or RPi connector GPIO
PB9VDDQSPI0QSPI0_IO3Octal SPI0 I/O line 3
PB10VDDQSPI0QSPI0_IO2Octal SPI0 I/O line 2
PB11VDDQSPI0QSPI0_IO1Octal SPI0 I/O line 1
PB12VDDQSPI0QSPI0_IO0Octal SPI0 I/O line 0
PB13VDDQSPI0QSPI0_CSOctal SPI0 Chip Select
PB14VDDQSPI0QSPI0_SCKOctal SPI0 serial clock
PB15VDDQSPI0PB15MCP16502 HPM control
PB16VDDQSPI0QSPI0_IO4Octal SPI0 I/O line 4
PB17VDDQSPI0QSPI0_IO5Octal SPI0 I/O line 5
PB18VDDQSPI0QSPI0_IO6Octal SPI0 I/O line 6
PB19VDDQSPI0QSPI0_IO7Octal SPI0 I/O line 7
PB20VDDQSPI0QSPI0_DQSOctal SPI0 data strobe
PB21VDDQSPI0QSPI0_INTOctal SPI0 interrupt
PB22VDDQSPI1QSPI1_IO3RPi connector QSPI1 I/O line 3
PB23VDDQSPI1QSPI1_IO2RPi connector QSPI1 I/O line 2
PB24VDDQSPI1QSPI1_IO1RPi connector QSPI1 I/O line 1
PB25VDDQSPI1QSPI1_IO0RPi connector QSPI1 I/O line 0
PB26VDDQSPI1QSPI1_CSRPi connector QSPI1 Chip Select
PB27VDDQSPI1QSPI1_SCKRPi connector QSPI1 serial clock
PB28VDDSDMMC1SDMMC1_RSTNSD Card reset signal
PB29VDDSDMMC1SDMMC1_CMDSD Card command line
PB30VDDSDMMC1SDMMC1_CKSD Card clock signal
PB31VDDSDMMC1SDMMC1_DAT0SD Card data line 0