6.1.1.5 Movff/movffl Instructions

The movff instruction is a physical device instruction, but for PIC18 devices that have extended data memory, it also serves as a placeholder for the movffl instruction.

For these devices, when generating output for the movff instruction, the assembler checks the psects that hold the operand symbols. If the psect containing the source operand and the psect containing the destination operand both specify the lowdata psect flag, the instruction is encoded as the two-word movff instruction. If an operand is an absolute address and that address is in the lower 4 KB of memory, then that is also considered acceptable for the shorter form of the instruction. In all other situations, the instruction is encoded as a three-word movffl instruction.

Note that assembly list files will always show the movff mnemonic, regardless of how it is encoded. Check the number of op-code words to determine which instruction was encoded.