24.3.3 Pattern Generation

The Pattern Generator mode can be used to produce a synchronized bit pattern across the pins the WEX connects to. If configuring the input matrix (the INMX bit field in the WEXCTRLA register) to CWCMA mode, the same waveform will be output on all channels. Enabling Dead Time will cause all high sides to be equal and all low sides to be equal.

These features are primarily intended for handling the commutation sequence in brushless DC motor (BLDC) and stepper motor applications. Figure 24-6 shows a block diagram of the Pattern Generator. For each port pin where the corresponding Pattern Generation Override (WEXn.PGMOVR) bit is set, a fixed level is generated as configured by the Pattern Generation Output (WEXn.PGMOUT) register.

As with the other timer/counter double-buffered registers, the register update is synchronized to the UPDATE condition set by the Waveform Generation mode. If the synchronization provided is not required by the application, the application code can simply access the Pattern Generation Override (WEXn.PGMOVR) and Output (WEXn.PGMOUT) registers directly.

By using the software UPDATE CMD, the WEX can work independently of the Timer/Counter when in Pattern Generation mode.