11.5.6 Status
| Name: | STATUS |
| Offset: | 0x06 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ERROR[2:0] | FLBUSY | EEBUSY | |||||||
| Access | R/W | R/W | R/W | R | R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bits 6:4 – ERROR[2:0] Error Code
The error code bit field reports the status of the last programming operation.
Only if/when the operation causing the error is followed by a legal operation
-WRONGSECTION and WRITEPROTECT are
cleared. If a CMDCOLLISION error occurs, any new programming
operation will be ignored, until the error clears. Ensure no programming
operation is ongoing (see FBUSY and EEBUSY flags) before clearing this error, or
the error will be reported again.
Write a ‘0’ to clear the Error Code bit field.
Note: Rules for error/halting:
- If changing the command
while programming is ongoing, then the
CMDCOLLISIONerror is set. - If ERROR =
CMDCOLLISION, then the programming operation is ignored. - The CPU is halted if accessing (read/write) while the NVM section is busy.
| Value | Name | Description |
|---|---|---|
| 0x00 | NONE | No error |
| 0x02 | WRITEPROTECT | Attempting to write a write-protected section |
| 0x03 | CMDCOLLISION | Selecting a new write command while a write command is already selected |
| 0x04 | WRONGSECTION | Wrong write command for the address used |
Bit 1 – FLBUSY Flash Busy
1’ when a Flash programming operation is
ongoing.Bit 0 – EEBUSY EEPROM Busy
1’ when an EEPROM programming operation is
ongoing.