31.5.7 LUT n Control B

Note:
  1. SPI connections to the CCL work in Host SPI mode only.
  2. USART connections to the CCL work only when the USART is in one of the following modes:
    • Asynchronous USART
    • Synchronous USART host
Name: LUTnCTRLB
Offset: 0x09 + n*0x04 [n=0..3]
Reset: 0x00
Property: Enable-Protected

Bit 76543210 
 INSEL1[3:0]INSEL0[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:4 – INSEL1[3:0] LUT n Input 1 Source Selection

These bits select the source for input 1 of LUT n.

ValueNameDescription
0x00MASKMasked input
0x01FEEDBACKFeedback input
0x02LINKOutput from LUT(n+1) as input source
0x03EVENTAEvent A as input source
0x04EVENTBEvent B as input source
0x05IN1IN1 input source
0x06AC1AC1 OUT input source
0x07USART0USART0 TXD input source
0x08SPI0SPI0 MOSI input source
0x09TCE0TCE0 WO1 input source
0x0ATCB1TCB1 WO input source
0x0BTCF0TCF0 WO1 input source
0x0CWEX0WEX Fault Blanking input source
Other-Reserved

Bits 3:0 – INSEL0[3:0] LUT n Input 0 Source Selection

These bits select the source for input 0 of LUT n.

ValueNameDescription
0x00MASKMasked input
0x01FEEDBACKFeedback input
0x02LINKOutput from LUT(n+1) as input source
0x03EVENTAEvent A as input source
0x04EVENTBEvent B as input source
0x05IN0IN0 input source
0x06AC0AC0 OUT input source
0x07USART0USART0 TXD input source
0x08SPI0SPI0 MOSI input source
0x09TCE0TCE0 WO0 input source
0x0ATCB0TCB0 WO input source
0x0BTCF0TCF0 WO0 input source
0x0BWEX0WEX Fault Blanking input source
Other-Reserved