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PIC32CX-BZ2 and WBZ45 Family Data Sheet

PIC32CX-BZ2 WBZ451 WBZ450

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9 Prefetch Cache (PCHE)
9.8 Effects of Reset

Introduction
PIC32CX-BZ2 SoC Family Features
WBZ45 Module Features
1 Ordering Information
2 Configuration Summary
3 PIC32CX-BZ2 SoC Description
4 WBZ45 Module Description
5 Pinout and Signal Descriptions List
6 I/O Ports and Peripheral Pin Select (PPS)
7 Power Subsystem
8 Product Memory Mapping Overview
9 Prefetch Cache (PCHE)
10 Processor and Architecture
11 Cortex M Cache Controller (CMCC)
12 Device Service Unit (DSU)
13 Clock and Reset Unit (CRU)
14 RAM Error Correction Code (RAMECC)
15 Power Management Unit (PMU)
16 Watchdog Timer (WDT)
17 Deadman Timer (DMT)
18 System Configuration and Register Locking (CFG)
19 Register Locking
20 Peripheral Module Disable Register (PMD)
21 Real-Time Counter and Calendar (RTCC)
22 Direct Memory Access Controller (DMAC)
23 External Interrupt Controller (EIC)
24 Flash Memory
25 Integrity Check Monitor (ICM)
26 Peripheral Access Controller (PAC)
27 Frequency Meter (FREQM)
28 Event System (EVSYS)
29 Serial Communication Interface (SERCOM)
30 SERCOM Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
31 SERCOM Serial Peripheral Interface (SERCOM SPI)
32 SERCOM Inter-Integrated Circuit (SERCOM I²C)
33 Quad Serial Peripheral Interface (QSPI)
34 Configurable Custom Logic (CCL)
35 True Random Number Generator (TRNG)
36 Advanced Encryption Standard (AES)
37 Public Key Cryptography Controller (PUKCC)
38 Analog-to-Digital Converter (ADC)
39 Analog Comparators (AC)
40 Timer/Counter (TC)
41 Timer/Counter for Control Applications (TCC)
42 Zigbee Bluetooth Radio Subsystem (ZBT)
43 Electrical Characteristics
44 Packaging Information
45 Appendix A: Regulatory Approval
46 Document Revision History
Microchip Information

9.8 Effects of Reset

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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