9.12 Register Description

The CHECON and CHESTAT registers in the Register Summary table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See CLR, SET and INV Registers from Related Links.

The following are the description of the legends:
  • R = Readable bit
  • W = Writable bit
  • S = Settable bit
  • C = Clearable bit
  • HC = Hardware Cleared
  • HS = Hardware Set