47.6.14.2 Monitors and Reports

When register write protection is enabled, any incorrect access is reported in I2SMCC_WPSR.WPVS and in I2SMCC_ISRB.WERR. It is possible to trigger an interrupt by writing a ‘1’ in I2SMCC_IERB.WERR.

I2SMCC embeds an on-the-fly monitoring of the WS and CK output pads to speed-up detection and report of any error while transmitting a data. The monitor cannot be disabled for safety reason and only reports an error in the user interface (i.e. there is no action on transmission path).

The I2SMCC internal outputs are passed through IO multiplexing logic that may be unintentionally badly configured and leads to absence or bad transmission. Other causes of stuck-at are detected (external cause such as short-circuits or internal cause such as pad buffer transistor failure). As an example, a badly re-assigned I2SMCC_WS/CK IO pin (software error) is detected as soon as the I2SMCC starts transmitting a data because it is unlikely for another peripheral sharing the same IO pin to drive the same waveform as the I2SMCC on I2SMCC_WS/CK output.

The monitor is enabled when the I2SMCC is configured in Host mode (I2SMCC_MRA.MODE=1).

An error is reported in I2SMCC_WPSR.PADERR and in I2SMCC_ISR.SECE when there is evidence that the output values on I2SMCC_WS or I2SMCC_CK differ from the internal values generated by the I2SMCC.

When an I2S format is configured (I2SMCC_MRA.FORMAT < 2), the I2SMCC_WS output pad value is oversampled by 2 and, as soon as 2 consecutive samples differ from the internal value generated by the I2SMCC, an error is reported. The rising edges of the I2SMCC_CK output are counted during a reference period equal to an audio sample period and at the end of each counting period, an error is reported if the counter is below seven at the end of the reference period (the minimum data length of an audio sample being eight bits).

When a TDM format is configured (I2SMCC_MRA.FORMAT > 1), the I2SMCC_WS output is monitored in a manner that differs from I2S formats because the waveform of WS can be configured with a minimum high duration pulse of 1 bit time. An error is reported if no falling edge is detected (thus the monitor checks that the output level is not stuck at 1 or 0). The I2SMCC_CK check is performed in the same way as in I2S format.

The detection method minimizes the likelihood to report a false positive that could result for example from a single upset event.

The monitor covers any failure that would be located in the I2SMCC IO multiplexing downstream circuitry, test logic, output pad buffer and external transmission line from the output pad to any buffering circuitry (if discrete components are placed between the transmitter and far-end receiver).

When an error is reported, it is possible to trigger an interrupt by writing a ‘1’ in I2SMCC_IER.SECE.