67.9 Operation and Power Consumption in Low-Power Modes
The SAM9X7 Series features four low-power modes summarized in Table 67-57. A detailed description of each mode is provided in the following sections.
|
Backup Mode |
ULP1 |
ULP0 |
Idle |
||
|---|---|---|---|---|---|
|
VDDBU power |
✓ |
✓ |
✓ |
✓ |
|
|
Other power supply inputs |
✗ |
✓ |
✓ |
✓ |
|
|
DDR self-refresh |
– |
✓ |
✓ |
✗ |
|
|
Main crystal oscillator |
– |
✓ |
✓ |
✓ |
|
|
Main RC oscillator |
– |
✓ |
✓ |
✓ |
|
|
MAINCK (main clock) |
Source |
– |
Main RC osc. |
Main RC osc. |
User-defined |
|
Status |
– |
✗ |
✗ |
✓ |
|
|
MCK (main system bus clock) |
Source |
– |
MAINCK |
User-defined (MD_SLCK, MAINCK, etc.) |
User-defined |
|
Status |
– |
✗ |
✗ |
✓ |
|
|
HCLK (CPU clock) |
– |
✗ |
✗ |
✗ |
|
|
CPU state |
– |
Clocks stopped |
WFI |
WFI |
|
|
Mode entry |
Use SHDWC to shutdown all power rails except VDDBU |
DDR-saved context DDR self-refreshed ULP1 bit |
DDR-saved context DDR self-refreshed WFI |
WFI |
|
|
Wake-up |
Sources |
RTC alarm WKUP0 pin |
RTC/RTT alarm USB resume Wake-On-LAN WKUP[13:0] |
Any non-masked interrupt |
Any non-masked interrupt |
|
Event or interrupt sampling clock |
MD_SLCK |
Asynchronous |
User-defined (MCK, periph_clk, etc.) |
User-defined |
|
|
MCK at wake-up |
MAINCK (defaults to Main RC osc.) |
MAINCK (Main RC osc.) |
User-defined |
User-defined |
|
- ✓/✗ means either powered/unpowered for a power source, on/off for an oscillator, active/inactive for a clock signal, or in/out of Self-refresh mode for the external SDRAM.