Figure 38-16. ATtiny1614/1616/1617: IO Pin Input Hysteresis vs. VDD
Figure 38-17. ATtiny1614/1616/1617: IO Pin Input Threshold Voltage vs. VDD (T=25°C)
Figure 38-18. ATtiny1614/1616/1617: IO Pin Input Threshold Voltage vs. VDD
(VIH)
Figure 38-19. ATtiny1614/1616/1617: IO Pin Input Threshold Voltage vs. VDD
(VIL)
GPIO Output Characteristics
Figure 38-20. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Sink Current (VDD=1.8V)
Figure 38-21. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Sink Current (VDD=3.0V)
Figure 38-22. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Sink Current (VDD=5.0V)
Figure 38-23. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Sink Current (T=25°C)
Figure 38-24. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Source Current (VDD=1.8V)
Figure 38-25. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Source Current (VDD=3.0V)
Figure 38-26. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Source Current (VDD=5.0V)
Figure 38-27. ATtiny1614/1616/1617: IO Pin Output Voltage vs. Source Current (T=25°C)
GPIO Pull-Up Characteristics
Figure 38-28. ATtiny1614/1616/1617: IO Pin Pull-Up Resistor Current vs. Input Voltage
(VDD=1.8V)
Figure 38-29. ATtiny1614/1616/1617: IO Pin Pull-Up Resistor Current vs. Input Voltage
(VDD=3.0V)
Figure 38-30. ATtiny1614/1616/1617: IO Pin Pull-Up Resistor Current vs. Input Voltage
(VDD=5.0V)
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