30.5.1 Control A
Name: | CTRLA |
Offset: | 0x00 |
Reset: | 0x00 |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
RUNSTBY | RESSEL | ENABLE | |||||||
Access | R/W | R | R | R | R | R/W | R/W | ||
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – RUNSTBY Run in Standby
This bit determines whether the ADC needs to run when the chip is in standby sleep mode.
Bit 2 – RESSEL Resolution Selection
This bit selects the ADC resolution.
Value | Description |
---|---|
0 | Full 10-bit resolution. The 10-bit ADC results are accumulated or stored to the ADC Result register (ADC.RES). |
1 | 8-bit resolution. The conversion results are truncated to 8 bits (MSBs) before they are accumulated or stored to the ADC Result register (ADC.RES). The two least significant bits are discarded. |
Bit 0 – ENABLE ADC Enable
Value | Description |
---|---|
0 | ADC is disabled. |
1 | ADC is enabled. |