21.3.3.1.8 8-bit PWM Mode

This timer can also be configured to run in 8-bit PWM mode where each of the register pairs in the 16-bit compare/capture register (TCB.CCMPH and TCB.CCMPL) are used as individual compare registers. The counter will continuously count from zero to CCMPL and the output will be set at BOTTOM and cleared when the counter reaches CCMPH.

Output of the module for different capture register values are explained below.

• CCMPL = 0 $\implies$ Output = 0

• CCMPL = 0xFF

  • CCMPH = 0 $\implies$ Output = 0
  • 0 < CCMPH ≤ 0xFF $\implies$ Output = 1 for CCMPH cycles, low for the rest of the period
• For 0 < CCMPL < 0xFF

  • CCMPH = 0 $\implies$ Output = 0
  • If 0 < CCMPH ≤ CCL $\implies$ Output = 1 for CCMPH cycles, low for the rest
  • CCMPH = CCMPL + 1 $\implies$ Output = 1