25.5.10 Counter Register

The TCFn.CNT0, TCFn.CNT1, TCFn.CNT2 and TCFn.CNT3 registers represent the 32-bit value TCFn.CNT. Byte 0 [7:0] is accessible at the original offset. Byte 1 [15:8] is accessible at the offset + 0x1. Byte 2 [23:16] is accessible at the offset + 0x2. Byte 3 [31:24] is accessible at the offset + 0x3, but it never contains any data.

A write or read access to byte 2 (offset + 0x2) triggers a new synchronization.

In the 8-bit PWM mode, only TCFn.CNT0 and TCFn.CNT1 are used and accessed as independent registers. TCFn.CNT2 and TCFn.CNT3 do not have any function in this mode.

Name:	CNT
Offset:	0x10
Reset:	0x00
Property:	Double-Buffered


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
	CNT[23:16]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CNT[15:8]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CNT[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 23:0 – CNT[23:0] Counter

This bit field holds the Counter register.