13.5.1 SEC_BOOT – Secure Boot Register
Note:
- These register bits are reset on any device reset.
- These register bits are reset only on POR reset.
Name: | SEC_BOOT |
Offset: | 0xC00 |
Reset: | 0x00000000 |
Property: | - |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
SEC_BOOT_DONE(1)[1:0] | |||||||||
Access | R/S | R/S | |||||||
Reset | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
BOOT_STATUS(2)[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Access | |||||||||
Reset |
Bits 17:16 – SEC_BOOT_DONE(1)[1:0] Bits to Indicate that Secure Boot is Done
Firmware can only set these bits. Firmware can never clear these bits.
These bits drive sec_boot_done output.
Value | Description |
---|---|
00 | Secure boot is done |
01 | Secure boot is not done |
10 | Secure boot is not done |
11 | Secure boot is done |
Bits 15:8 – BOOT_STATUS(2)[7:0] Firmware Managed Bits to Indicate Secure Boot Status
The 8-bit code is written to this field to indicate the secure boot status - like authentication success or failure or any other kind of indication. The code and its corresponding message is to be determined by the firmware. Refer to Application Transition for the Boot Status firmware definition.
This field can be reset only on POR reset.
This field drives boot_status[7:0] output from the macro.