20.9.1 WDTCON - Watchdog Timer Control Register


Bit	31	30	29	28	27	26	25	24
	WDTCLRKEY[15:8]
Access	W	W	W	W	W	W	W	W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	WDTCLRKEY[7:0]
Access	W	W	W	W	W	W	W	W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	ON			RUNDIV[4:0]
Access	R/W			R	R	R	R	R
Reset	y			y	y	y	y	y


Bit	7	6	5	4	3	2	1	0
			SLPDIV[4:0]					WDTWINEN
Access			R	R	R	R	R	R/W
Reset			y	y	y	y	y	0

Bits 31:16 – WDTCLRKEY[15:0] Watchdog Timer Clear Key bits

To clear the WDT to prevent a time-out, software must write the value 0x5743 to this location using a single 16-bit write. Anything other than a 16-bit write will not reset the WDT. You must use a 16-bit write for the WDTCLRKEY[15:0] bits.

Bit 15 – ON Watchdog Timer Enable bit

Note:

This bit only has control when the WDTEN bit (DEVCFG2/CFGCON2[23]) = 0.

Value	Description
1	WDT is enabled
0	WDT is disabled

Bits 12:8 – RUNDIV[4:0] Watchdog Timer Postscaler Run Counter Value bits

On Reset, these bits are set to the values of the WDTPSR[4:0] Configuration bits in CFGCON2.

Bits 5:1 – SLPDIV[4:0] Watchdog Timer Postscaler Sleep Counter Value bits

On Reset, these bits are set to the values of the WDTPSS[4:0] Configuration bits in CFGCON1.

Bit 0 – WDTWINEN Watchdog Timer Window Enable bit

Value	Description
1	Enable windowed WDT
0	Disable windowed WDT

Name:	WDTCON
Offset:	0x00
Reset:	0x00
Property:	-