1.2.1 Microcontroller Subsystem (MSS)
(Ask a Question)The MSS is composed of a 100 MHz Cortex-M3 processor and integrated peripherals, which are interconnected via a multi-layer AHB bus matrix (ABM). This matrix allows the Cortex-M3 processor, FPGA fabric master, Ethernet Message Authentication Controller (MAC), when available, and peripheral DMA (PDMA) controller to act as masters to the integrated peripherals, FPGA fabric, embedded Nonvolatile Memory (eNVM), embedded Synchronous RAM (eSRAM), external memory controller (EMC), and Analog Compute Engine (ACE) blocks.
SmartFusion cSoCs of different densities offer various sets of integrated peripherals. Available peripherals include SPI, I2C, and UART serial ports, embedded FlashROM (EFROM), 10/100 Ethernet MAC, timers, Phase-Locked Loops (PLLs), oscillators, Real-Time Counters (RTC), and Peripheral DMA Controller (PDMA).