9.12 Power Control (PCON0) Register

The Power Control (PCON0) register contains flag bits to differentiate between a:

• Brown-out Reset (BOR)
• Power-on Reset (POR)
• Reset Instruction Reset (RI)
• MCLR Reset (RMCLR)
• Watchdog Timer Reset (RWDT)
• Watchdog Window Violation (WDTWV)
• Stack Underflow Reset (STKUNF)
• Stack Overflow Reset (STKOVF)

The Power Control register bits are shown in PCON09.14.2 PCON0 .

Hardware will change the corresponding register bit during the Reset process; if the Reset was not caused by the condition, the bit remains unchanged (Table 9-3).

Software should reset the bit to the Inactive state after restart (hardware will not reset the bit).

Software may also set any PCON0 bit to the Active state, so that user code may be tested, but no Reset action will be generated.