7.1.2 Interrupts During Doze

If an interrupt occurs and the Recover-On-Interrupt bit is clear (ROI = 0) at the time of the interrupt, the Interrupt Service Routine (ISR) continues to execute at the rate selected by DOZE[2:0]. Interrupt latency is extended by the DOZE[2:0] ratio.

If an interrupt occurs and the ROI bit is set (ROI = 1) at the time of the interrupt, the DOZEN bit is cleared and the CPU executes at full speed. The prefetched instruction is executed and then the interrupt vector sequence is executed. In Figure 7-1, the interrupt occurs during the 2nd instruction cycle of the Doze period, and immediately brings the CPU out of Doze. If the Doze-On-Exit (DOE) bit is set (DOE = 1) when the RETFIE operation is executed, DOZEN is set, and the CPU executes at the reduced rate based on the DOZE[2:0] ratio.

Figure 7-2. Doze Software Example
//Mainline operation
bool somethingToDo = FALSE:
void main()
{
initializeSystem();
// DOZE = 64:1 (for example)
// ROI = 1;
GIE = 1; // enable interrupts
while (1)
{
// If ADC completed, process data
if (somethingToDo)
{
doSomething();
DOZEN = 1; // resume low-power
}
}
}
// Data interrupt handler
void interrupt()
{
// DOZEN = 0 because ROI = 1
if (ADIF)
{
somethingToDo = TRUE;
DOE = 0; // make main() go fast
ADIF = 0;
}
// else check other interrupts...
if (TMR0IF)
{
timerTick++;
DOE = 1; // make main() go slow
TMR0IF = 0;
}
}