4.2.5 System Pin List

Table 4-5. System Pin Description
Pin No. Pin Name Power Rail I/O Type Description Note
136 HSDA_P VDD_3V3 I/O USB host port A high-speed data + –
135 HSDA_N VDD_3V3 I/O USB host port A high-speed data - –
138 HSDB_P VDD_3V3 I/O USB host port B high-speed data + –
137 HSDB_N VDD_3V3 I/O USB host port B high-speed data - –
140 HSDC_P VDD_3V3 I/O USB host port C high-speed data + –
139 HSDC_N VDD_3V3 I/O USB host port C high-speed data - –
44 WKUP0 VDDBU I Wake-up input 2
37 SHDN VDDBU O Shutdown control –
149 JTAGSEL VDDBU I JTAG selection –
14 TCK VDD_3V3 I Test clock –
15 TDI VDD_3V3 I Test data in –
16 TDO VDD_3V3 O Test data out –
13 TMS VDD_3V3 I Test mode select –
17 RTCK VDD_3V3 O Return test clock –
43 NRST VDD_3V3 I/O External nReset input/output 1
28 NSTART 5V_MAIN I/PU Start event input. Drive to low to initiate a start-up sequence. –
30 LOUT_FB VLDO1 I LDO feedback pin. Connect to external resistor divider to VLDO1 for output voltage adjustment. –
31 LEN 5V_MAIN I VLDO1 enable input –
68 ETH0_RX_N – I/O Physical receive or transmit signal (– differential) –
69 ETH0_RX_P – I/O Physical receive or transmit signal (+ differential) –
70 ETH0_TX_N – I/O Physical transmit or receive signal (– differential) –
71 ETH0_TX_P – I/O Physical transmit or receive signal (+ differential) –
66 ETH0_LED0 – I/PU/O Programmable LED0 output 1
132 24M_EN VDD_3V3 I 24-MHz MEMS oscillator input pin used for main clock –
75 25M_EN VDD_3V3 I 25-MHz MEMS oscillator input pin used for Ethernet clock –
11 NAND_CS_IN VDD_3V3 I NAND Flash chip select input. Connect to pin 12. 1
Note:
  1. The signal is internally pulled up with a 10 kΩ resistor.
  2. The signal is internally pulled up with a 100 kΩ resistor.