4.2.2 PIOB Pin List
Pad No. |
Power |
I/O Type | Primary | Alternate | PIO Peripheral | Reset State | Note | ||||
---|---|---|---|---|---|---|---|---|---|---|---|
Signal | Dir | Signal | Dir | Func | Signal | Dir |
Signal, Dir, |
||||
-- | VDDANA | GPIO | PB0 | I/O | – | – | A | E0_RX0 | I | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB1 | I/O | – | – | A | E0_RX1 | I | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB2 | I/O | – | – | A | E0_RXER | I | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB3 | I/O | – | – | A | E0_RXDV | I | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB4 | I/O | – | – | A | E0_TXCK | I/O | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB5 | I/O | – | – | A | E0_MDIO | I/O | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB6 | I/O | – | – | A | E0_MDC | O | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB7 | I/O | – | – | A | E0_TXEN | O | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB8 | I/O | – | – | – | – | I | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB9 | I/O | – | – | A | E0_TX0 | O | PIO, I, PU, ST | 1 |
-- | VDDANA | GPIO | PB10 | I/O | – | – | A | E0_TX1 | O | PIO, I, PU, ST | 1 |
150 | VDDANA | GPIO | PB11 | I/O | AD0 | – | B | PWM0 | O | PIO, I, PU, ST | 2 |
151 | VDDANA | GPIO | PB12 | I/O | AD1 | – | B | PWM1 | O | PIO, I, PU, ST | 2 |
65 | VDDANA | GPIO | PB13 | I/O | AD2 | – | B | PWM2 | O | PIO, I, PU, ST | 2 |
84 | VDDANA | GPIO | PB14 | I/O | AD3 | – | B | PWM3 | O | PIO, I, PU, ST | 2 |
– | VDDANA | GPIO | PB15 | I/O | AD4 | – | – | – | – | PIO, I, PU, ST | 2 |
24 | VDDANA | GPIO | PB16 | I/O | AD5 | – | – | – | – | PIO, I, PU, ST | 2 |
72 | VDDANA | GPIO | PB17 | I/O | AD6 | – | – | – | – | PIO, I, PU, ST | 2 |
148 | VDDANA | GPIO | PB18 | I/O | WKUP7 | – | A | IRQ | I | PIO, I, PU, ST | – |
B | ADTRG | I | |||||||||
64 | VDDQSPI | GPIO | PB19 | I/O | – | – | A | QSCK | O | PIO, I, PU, ST | – |
B | I2SMCC_CK | I/O | |||||||||
C | FLEXCOM11_IO0 | I/O | |||||||||
60 | VDDQSPI | GPIO | PB20 | I/O | – | – | A | QCS | O | PIO, I, PU, ST | – |
B | I2SMCC_WS | I/O | |||||||||
C | FLEXCOM11_IO1 | I/O | |||||||||
61 | VDDQSPI | GPIO | PB21 | I/O | – | – | A | QIO0 | I/O | PIO, I, PU, ST | – |
B | I2SMCC_DIN0 | I | |||||||||
C | FLEXCOM12_IO0 | I/O | |||||||||
62 | VDDQSPI | GPIO | PB22 | I/O | – | – | A | QIO1 | I/O | PIO, I, PU, ST | – |
B | I2SMCC_DOUT0 | O | |||||||||
C | FLEXCOM12_IO1 | I/O | |||||||||
63 | VDDQSPI | GPIO | PB23 | I/O | – | – | A | QIO2 | I/O | PIO, I, PU, ST | – |
B | I2SMCC_MCK | O | |||||||||
59 | VDDQSPI | GPIO | PB24 | I/O | – | – | A | QIO3 | I/O | PIO, I, PU, ST | – |
26 | VDDIOP0 | GPIO | PB25 | I/O | WKUP8 | – | A | NRST_OUT | O | NRST_OUT, O, PD | – |
B | NTRST | I |
Note:
- Fixed feature due to the SAM9X60D1G-I/LZB internal connection.
- Limited feature compared to SAM9X60D1G due to the use of a part of the functionality for other features in the SAM9X60D1G-I/LZB, for example GMAC or FLEXCOM.