20.8.18 OSC48M Calibration

This register (bits 0 to 21) must be updated with the corresponding data in the NVM Software Calibration Area: CAL48M 5V or CAL48M 3V3, depending on the VDD range. Refer to 9.4 NVM Software Calibration Area Mapping.

Note: This register is only available for Rev D silicon.
Name: CAL48M
Offset: 0x38
Reset: Calibrated value for VDD range 3.6 V to 5.5 V
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
   TCAL[5:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset xxxxxx 
Bit 15141312111098 
       FRANGE[1:0] 
Access R/WR/W 
Reset xx 
Bit 76543210 
   FCAL[5:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset xxxxxx 

Bits 21:16 – TCAL[5:0] Temperature Calibration

Bits 9:8 – FRANGE[1:0] Frequency Range

Bits 5:0 – FCAL[5:0] Frequency Calibration