17.8.8 APBB Mask

Name: APBBMASK
Offset: 0x18
Reset: 0x00000007
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
   HMATRIXHS  NVMCTRLDSUPORT 
Access R/WR/WR/WR/W 
Reset 0111 

Bit 5 – HMATRIXHS HMATRIXHS APBB Clock Enable

ValueDescription
0The APBB clock for the HMATRIXHS is stopped
1The APBB clock for the HMATRIXHS is enabled

Bit 2 – NVMCTRL NVMCTRL APBB Clock Enable

ValueDescription
0The APBB clock for the NVMCTRL is stopped
1The APBB clock for the NVMCTRL is enabled

Bit 1 – DSU DSU APBB Clock Enable

ValueDescription
0The APBB clock for the DSU is stopped
1The APBB clock for the DSU is enabled

Bit 0 – PORT PORT APBB Clock Enable

ValueDescription
0The APBB clock for the PORT is stopped.
1The APBB clock for the PORT is enabled.