30.6.8 Synchronization Busy
| Name: | SYNCBUSY |
| Offset: | 0x1C |
| Reset: | 0x00000000 |
| Property: | – |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CTRLB | ENABLE | SWRST | |||||||
| Access | R | R | R | ||||||
| Reset | 0 | 0 | 0 |
Bit 2 – CTRLB CTRLB Synchronization Busy
Writing to the CTRLB when the SERCOM is enabled requires synchronization.
Ongoing synchronization is indicated by this bit. If CTRLB is written while this bit
is set to ‘1’, an APB error will be generated.
| Value | Description |
|---|---|
| 0 | CTRLB synchronization is not busy |
| 1 | CTRLB synchronization is busy |
Bit 1 – ENABLE SERCOM Enable Synchronization Busy
Enabling and disabling the SERCOM (CTRLA.ENABLE) requires synchronization. Ongoing synchronization is indicated by this bit.
| Value | Description |
|---|---|
| 0 | Enable synchronization is not busy |
| 1 | Enable synchronization is busy |
Bit 0 – SWRST Software Reset Synchronization Busy
Resetting the SERCOM (CTRLA.SWRST) requires synchronization. Ongoing synchronization is indicated by this bit.
| Value | Description |
|---|---|
| 0 | SWRST synchronization is not busy |
| 1 | SWRST synchronization is busy |