23.4.2.1 Enabling, Disabling and Resetting

The TCC is enabled by writing a '1' to the Enable bit in the Control A register (CTRLA.ENABLE). The TCC is disabled by writing a '0' to CTRLA.ENABLE.

The TCC is reset by writing '1' to the Software Reset bit in the Control A register (CTRLA.SWRST). All registers in the TCC, except for the Debug control register (DBGCTRL), will be reset to their initial state, and the TCC will be disabled. Refer to the Control A (CTRLA) register for details.

The TCC should be disabled before it is reset to avoid undefined behavior.