33.4.3.4 Low-pass Filter

Low-pass Filter mode works together with accumulation modes to effectively mitigating high-frequency noise.

When Low-pass Filter mode is enabled, the behavior of the accumulation modes changes. After an initial accumulation of samples, as configured in the Sample Accumulation Number Select bit field in the Control D register (CTRLD.SAMPNUM), the ADC continues to sample and accumulate indefinitely.

During the accumulation phase, while the specified number of samples are being accumulated, no filtering is applied. Once the specified number of samples have been converted, the Result (RESULT) register is updated as normal.

After the accumulation phase, the filter phase updates the accumulator with each new sample according to the following equation.

$RESULT=(\frac{SAMPNUM-1}{SAMPNUM}\times ACC)+SAMPLE$

As shown in the equation, the average of the accumulator (ACC) is subtracted as the new sample is added. The RESULT register is updated with every new sample, and the Result Ready (RESRDY) interrupt flag is set to ‘1’.

When using Low-pass Filter mode together with Series accumulation mode, each sample requires a trigger, both during the accumulation phase and the filter phase.

For Burst mode, a single trigger causes all samples in the accumulation phase to complete back-to-back. In the filter phase, the Free-Running bit in CTRLD (CTRLD.FREERUN) determines whether a trigger results in a single sample (when FREERUN is ‘0’) or back-to-back sampling (when FREERUN is ‘1’) until stopped.

Low-pass Filter mode can be used together with Sign Chopping to reduce offset error. During the filter phase, each ADC sample automatically triggers a second sample with the input inverted. The output from Sign Chopping is added as normal in the filtering phase. For more information about Sign Chopping, see the section Offset Reduction by Sign Chopping.