33.5.6 Events
The ADC can generate the following events:
| Generator Name | Description | Event Type | Generating Clock Domain | Length of Event | |
|---|---|---|---|---|---|
| Peripheral | Event | ||||
| ADCn | RESRDY | Result ready | Pulse | CLK_ADCn_APB | One CLK_ADCn_APB period |
| ADCn | SAMPRDY | Sample ready | Pulse | CLK_ADCn_APB | One CLK_ADCn_APB period |
| ADCn | WCMP | Window comparator | Pulse | CLK_ADCn_APB | One CLK_ADCn_APB period |
Writing a ‘1’ to an Event Output bit in the Event Control Register
(EVCTRL.xxEO) enables the corresponding output event. Writing a ‘0’ to this
bit disables the corresponding output event.
The ADC can connect to the following events:
| User Name | Description | Input Detection | Channel Path Type | |
|---|---|---|---|---|
| Peripheral | Input | |||
| ADCn | START | Conversion start | Edge | Asynchronous |
Writing a ‘1’ to an Event Input bit in the Event Control register
(EVCTRL.xxEI) enables the corresponding action on input event. Writing a ‘0’
to this bit disables the corresponding action on input event.
Refer to the EVSYS - Event System chapter for details on configuring the event system.
