8.2 Page Write

A page write sequence allows up to 8 bytes to be written during the same write cycle, provided that all bytes are within the same row of the memory array. Partial page writes of fewer than 8 bytes are allowed. After each byte of data is received, the three lowest-order address bits are internally incremented. The higher-order address bits are not incremented and therefore retain the memory-array page location. If more bytes of data are transmitted than can fit within the current memory row, the address counter rolls over to the beginning of the same row. However, rollover events should be avoided as previously loaded data in the page may be unintentionally altered. The AT25010B/AT25020B/AT25040B automatically returns to the Write Disable state (WEL = 0) upon completion of a write cycle.

Figure 8-2. Page Write
Note:
  1. This instruction initiates a self‑timed internal write cycle (tWC) on the rising edge of CS following a valid sequence.
  2. “A” represents the MSb address bit (A8) for the AT25040B and a “don’t care” bit for the AT25010B and AT25020B.