3 Debug Flow for Problem Isolation and Resolution

Utilize the following flow chart to help isolate the nature of the observed issue and to provide suggestions for common resolutions. Its recommended to always start with PHY hardware issues, even if you believe your issue is software or system related.

Figure 3-1. PHY Issue Debug Flow Chart
KSZ8081MNX Hardware Design ChecklistFundamental PCB DesignHardware Issue - Management Interface (MDC/MDIO) ConnectivityAppendix: Low level ManagementAN2686 Ethernet Compliance TestingHardware Issue - Ethernet ConnectivityAppendix: Ethernet Link Testing TechniquesHardware Issue - MII ConnectivityPerformace Issue - Application Level IssueKSZ8081/KSZ8091 Silicon Errata and Data Sheet ClearificationKSZ8081/KSZ8091 Silicon Errata and Data Sheet Clearification