18.2 PPS Inputs
Each digital peripheral has a dedicated PPS Peripheral Input
Selection (xxxPPS)
register, with which the input pin to the peripheral is selected. Devices that have 20 leads
or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more
allow PPS routing to I/Os contained within two ports, with the exception of the following
signals, which are routed to three ports:
- CLBINxPPS
- CLBCLKPPS
Important: The notation “xxx” in the generic register name
is a placeholder for the peripheral identifier. For example, xxx = T0CKI for the T0CKIPPS
register.
Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.
| Peripheral | PPS Input Register | Register Reset Value at POR | |
|---|---|---|---|
| 14-Pin Devices | 20-Pin Devices | ||
| External Interrupt | INTPPS | ‘b000
010 | |
| Timer0 Clock | T0CKIPPS | ‘b000
010 | |
| Timer1 Clock | T1CKIPPS | ‘b000
101 | |
| Timer1 Gate | T1GPPS | ‘b000
100 | |
| Timer3 Clock | T3CKIPPS | ‘b010
101 | |
| Timer 3 Gate | T3GPPS | ‘b010
100 | |
| Timer2 Input | T2INPPS | ‘b000
101 | |
| Timer4 Input | T4INPPS | ‘b010
001 | |
| CCP1 | CCP1PPS | ‘b010
101 | |
| CCP2 | CCP2PPS | ‘b010
011 | |
| PWM Input 0 | PWMIN0PPS | ‘b010
101 | |
| PWM Input 1 | PWMIN1PPS | ‘b010
011 | |
| PWM1 External Reset | PWMIN1ERSPPS | ‘b000
101 | |
| PWM2 External Reset | PWMIN2ERSPPS | ‘b010
001 | |
| CLCIN0 | CLCIN0PPS | ‘b010 011 | ‘b000 010 |
| CLCIN1 | CLCIN1PPS | ‘b010 100 | ‘b010 011 |
| CLCIN2 | CLCIN2PPS | ‘b010 001 | ‘b001 100 |
| CLCIN3 | CLCIN3PPS | ‘b000 101 | ‘b001 101 |
| SCL1/SCK1 | SSP1CLKPPS(1) | ‘b010 000 | ‘b001 110 |
| SDA1/SDI1 | SSP1DATPPS(1) | ‘b010 001 | ‘b001 100 |
| SS1 | SSP1SSPPS | ‘b010 011 | ‘b010 110 |
| RX1/DT1 | RX1PPS | ‘b010 101 | ‘b001 101 |
| CK1 | CK1PPS | ‘b010 100 | ‘b001 111 |
| RX2/DT2 | RX2PPS | ‘b010
001 | |
| CK2 | CK2PPS | ‘b010
000 | |
| ADC Conversion Trigger | ADACTPPS | ‘b010
010 | |
| CLB Clock | CLBCLKPPS | ‘b010 011 | ‘b000 010 |
| CLBIN0 | CLBIN0PPS | ‘b010 011 | ‘b000 010 |
| CLBIN1 | CLBIN1PPS | ‘b010 100 | ‘b010 011 |
| CLBIN2 | CLBIN2PPS | ‘b010 001 | ‘b001 100 |
| CLBIN3 | CLBIN3PPS | ‘b000 101 | ‘b001 101 |
Note:
- Bidirectional pin. The corresponding output must select the same pin.
