4.4.13 AVR XMEGA Special Considerations

OCD and Clocking

When the MCU enters Stopped mode, the OCD clock is used as MCU clock. The OCD clock is either the JTAG TCK if the JTAG interface is being used, or the PDI_CLK if the PDI interface is being used.

I/O Modules in Stopped Mode

In contrast to earlier Microchip megaAVR devices, in XMEGA the I/O modules are stopped in Stop mode. This means that USART transmissions will be interrupted, timers (and PWM) will be stopped.

Hardware Breakpoints

There are four hardware breakpoint comparators - two address comparators and two value comparators. They have certain restrictions:

  • All breakpoints must be of the same type (program or data)

  • All data breakpoints must be in the same memory area (I/O, SRAM, or XRAM)

  • There can only be one breakpoint if address range is used

Here are the different combinations that can be set:

  • Two single data or program address breakpoints

  • One data or program address range breakpoint

  • Two single data address breakpoints with single value compare

  • One data breakpoint with address range, value range, or both

MPLAB X IDE and Atmel Studio will tell you if the breakpoint cannot be set, and why. Data breakpoints have priority over program breakpoints, if software breakpoints are available.

External Reset and PDI Physical

The PDI physical interface uses the Reset line as clock. While debugging, the Reset pull-up should be 10k or more or be removed. Any Reset capacitors should be removed. Other external Reset sources should be disconnected.

JTAGEN Fuse

The JTAG interface is enabled using the JTAGEN fuse, which is programmed by default. This allows access to the JTAG programming interface.

Important: If the JTAGEN fuse is unintentionally disabled, it can only be re-enabled using the PDI physical interface.

If the JTAGEN fuse is programmed, the JTAG interface can still be disabled in firmware by setting the JTAG disable bit in the MCU Control Register. This will render code un-debuggable, and should not be done when attempting a debug session. If such code is already executing on the Microchip AVR device when starting a debug session, the Power Debugger will assert the RESET line while connecting. If this line is wired correctly, it will force the target AVR device into Reset, thereby allowing a JTAG connection.

If the JTAG interface is enabled, the JTAG pins cannot be used for alternative pin functions. They will remain dedicated JTAG pins until either the JTAG interface is disabled by setting the JTAG disable bit from the program code, or by clearing the JTAGEN fuse through a programming interface.

Tip:

Be sure to check the “use external reset” checkbox in both the programming dialog and debug options dialog in Atmel Studio in order to allow the Power Debugger to assert the RESET line and re-enable the JTAG interface on devices which are running code which disables the JTAG interface by setting the JTAG disable bit.

Debugging with Sleep for ATxmegaA1 rev H and Earlier

A bug existed on early versions of ATxmegaA1 devices that prevented the OCD from being enabled while the device was in certain sleep modes. There are two work-arounds to re-enable OCD:

  • Go into the Power Debugger. Options in the Tools menu and enable “Always activate external Reset when reprogramming device”.
  • Perform a chip erase

The sleep modes that trigger this bug are:

  • Power-Down
  • Power-Save
  • Standby
  • Extended Standby