3.4 Transceiver Reference Clock Design

A 156.25 MHz oscillator is available on the module to provide reference clock to the PolarFire transceiver block at the XCVR_0A_REFCLK pin. The oscillator output is standard LVDS. For more information about the electrical characteristics and supporting standards of the reference clock, see DS0141: PolarFire FPGA Datasheet.

Figure 3-4. XCVR REFCLK to FPGA