37.6.3 Transfer Data Rate

By default, the QSPI module is enabled in Single Data Rate (SDR) mode. In this operating mode, the CLK_QSPI2X_AHB clock is not used and can be disabled.

The Dual Data Rate (DDR) operating mode (read only) is enabled by writing a '1' to the Double Data Rate Enable bit in the Instruction Frame register (INSTRFRAME.DDREN). This operating mode requires the CLK_QSPI2X_AHB clock and must be enabled before writing the DDREN bit.