18.6.3.6 Regulators, RAMs, and NVM State in Sleep Mode

By default, in standby sleep mode and backup sleep mode, the RAMs, NVM, and regulators are automatically set in low-power mode in order to reduce power consumption:

  • The RAM is in low-power mode if the device is in standby mode.
  • Non-Volatile Memory - the NVM is automatically set in low power mode in these conditions:
    • When the device is in standby sleep mode and the NVM is not accessed. This behavior can be changed by software by configuring the SLEEPPRM bit group of the CTRLB register in the NVMCTRL peripheral.
    • When the device is in idle sleep mode and the NVM is not accessed. This behavior can be changed by software by configuring the SLEEPPRM bit group of the CTRLB register in the NVMCTRL peripheral.
  • Regulators: by default, in standby sleep mode, the PM analyzes the device activity to use either the main or the low-power voltage regulator to supply the VDDCORE.

GCLK clocks, regulators and RAM are not affected in idle sleep mode and will operate as normal.

Table 18-5. Regulators, RAMs, and NVM state in Sleep Mode
Sleep ModeSRAM ModeNVMRegulators
VDDCOREVDDBU
mainULP
Activenormalnormalononon
Idleauto(1)onononon
Standby - case 1normalauto(1)auto(2)onon
Standby - case 2low powerlow powerauto(2)onon
Standby - case 3low powerlow powerauto(2)onon
Standby - case 4low powerlow poweroffonon
Backupoffoffoffoffon
OFFoffoffoffoffoff
Note:
  1. auto: by default, NVM is in low-power mode if not accessed.
  2. auto: by default, the main voltage regulator is on if GCLK, APBx, or AHBx clock is running during SleepWalking.