25.6.14 Chip Erase

The chip erase operation is system-wide and issued through the DSU.

The chip erase procedure is as follows:

  1. Volatile memories are cleared and NVM array is erased simultaneously (except the BOOTPROT section).
  2. Special individual fuses are set as follows:
    • If the BOOTPROT section is not defined, then NVMCTRL STATUS.AFIRST = 1 otherwise it is left unchanged.
    • NVMCTRL SEESTAT.ASEES = 1.
    • NVMCTRL SEESTAT.LOCK = 0.
    • DSU STATUSB.CELCK = 0.
  3. The Security bit is cleared provided no internal error has been detected in the previous steps:
    • If all internal NVM verify operations have succeeded: go to 4.
    • Otherwise, set DSU STATUSA.DONE and DSU STATUSA.FAIL and exit.
  4. DSU STATUSB.PROT is cleared, the system is not protected.
Note: The CB, FS, USER pages (in the auxiliary address space) and the section allocated as a bootloader using BOOTPROT are not affected by the chip erase operation.