24.5.1 CCPxCON

CCP Control Register
Note:
  1. The set and clear operations of the Compare mode are reset by setting MODE = ‘b0000 or EN = 0.
  2. When MODE = ‘b0001 or ‘b1011, then the timer associated with the CCP module is cleared. TMR1 is the default selection for the CCP module, so it is used for indication purposes only.
Name: CCPxCON
Offset: 0x038E,0x0392

Bit 76543210 
 EN OUTFMTMODE[3:0] 
Access R/WRR/WR/WR/WR/WR/W 
Reset 0x00000 

Bit 7 – EN CCP Module Enable

ValueDescription
1CCP is enabled
0CCP is disabled

Bit 5 – OUT CCP Output Data (read-only)

Bit 4 – FMT CCPxRH:L Value Alignment (PWM mode)

ValueNameDescription
xCapture modeNot used
xCompare modeNot used
1PWM modeLeft aligned format
0PWM modeRight aligned format

Bits 3:0 – MODE[3:0] CCP Mode Select

Table 24-5. CCPx Mode Select
MODE ValueOperating ModeOperationSet CCPxIF
11xxPWMPWM operationYes
1011ComparePulse output; clear TMR1(2)Yes
1010Pulse outputYes
1001Clear output(1)Yes
1000Set output(1)Yes
0111CaptureEvery 16th rising edge of CCPx inputYes
0110Every 4th rising edge of CCPx inputYes
0101Every rising edge of CCPx inputYes
0100Every falling edge of CCPx inputYes
0011Every edge of CCPx inputYes
0010CompareToggle outputYes
0001Toggle output; clear TMR1(2)Yes
0000Disabled—
The set and clear operations of the Compare mode are reset by setting MODE = ‘b0000 or EN = 0.When MODE = ‘b0001 or ‘b1011, then the timer associated with the CCP module is cleared. TMR1 is the default selection for the CCP module, so it is used for indication purposes only.