10.6.3 Register Write Protection

To prevent any single software error from corrupting EIC behavior, certain registers in the address space can be write-protected.

The following register can be write-protected by setting WPCFEN in the Write Protection Mode register (EIC_WPMR):

• External Interrupt Controller Source Configuration register x (EIC_SCFGxR)

If a write access to a write-protected register is detected, the WPVS flag in the Write Protection Status register (EIC_WPSR) is set and WVSRC indicates the register in which the write access was attempted.

WPVS is automatically cleared after reading EIC_WPSR.

If a write attempts to modify the settings of an interrupt line x that was previously frozen by setting EIC_SCFGxR.FRZ, the FZWVS flag in EIC_WPSR is set and WVSRC indicates the register in which the write access was attempted.

FZWVS is automatically cleared after reading EIC_WPSR.

If a write attempts to modify the settings of the glitch filter of interrupt line x but the Source Configuration register x (EIC_SCFGxR) access is discarded due to an already ongoing glitch filter configuration, the FZWVS flag in EIC_WPSR is set and WVSRC indicates the register in which the write access was attempted.

FZWVS is automatically cleared after reading EIC_WPSR.