27.7.1 SHDWC Control Register
| Name: | SHDW_CR |
| Offset: | 0x00 |
| Reset: | – |
| Property: | Write-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| KEY[7:0] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| LPMDIS | LPMEN | ||||||||
| Access | W | W | |||||||
| Reset | – | – |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SHDW | |||||||||
| Access | W | ||||||||
| Reset | – |
Bits 31:24 – KEY[7:0] Password
| Value | Name | Description |
|---|---|---|
| 0xA5 | PASSWD | Writing any other value in this field aborts the write operation. |
Bit 22 – LPMDIS LPM Pad Disable
| Value | Description |
|---|---|
| 0 |
No effect. |
| 1 |
The LPM pad is set low (external regulator is set in standard powering state). |
Bit 21 – LPMEN LPM Pad Enable
| Value | Description |
|---|---|
| 0 |
No effect. |
| 1 |
The LPM pad is set high (external regulator is set in special powering state). |
Bit 0 – SHDW Shutdown Command
| Value | Description |
|---|---|
| 0 |
No effect. |
| 1 |
If KEY value is correct, asserts the SHDN pin. |