27.7.1 SHDWC Control Register

Name: SHDW_CR
Offset: 0x00
Reset: 
Property: Write-only

Bit 3130292827262524 
 KEY[7:0] 
Access WWWWWWWW 
Reset  
Bit 2322212019181716 
  LPMDISLPMEN      
Access WW 
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
        SHDW 
Access W 
Reset  

Bits 31:24 – KEY[7:0] Password

ValueNameDescription
0xA5 PASSWD

Writing any other value in this field aborts the write operation.

Bit 22 – LPMDIS LPM Pad Disable

ValueDescription
0

No effect.

1

The LPM pad is set low (external regulator is set in standard powering state).

Bit 21 – LPMEN LPM Pad Enable

ValueDescription
0

No effect.

1

The LPM pad is set high (external regulator is set in special powering state).

Bit 0 – SHDW Shutdown Command

ValueDescription
0

No effect.

1

If KEY value is correct, asserts the SHDN pin.