63.9.3.6.1 7-bit Client Addressing

When addressing 7-bit client devices, the internal address bytes are used to perform random address (read or write) accesses to reach one or more data bytes, for example, within a memory page location in a serial memory. When performing read operations with an internal address, the TWI performs a write operation to set the internal address into the client device, and then switch to Host Receiver mode. Note that the second start condition (after sending the IADR) is sometimes called “repeated start” (Sr) in I2C fully-compatible devices. See figure Host Read with One, Two or Three Bytes Internal Address and One Data Byte.

See figures Host Write with One, Two or Three Bytes Internal Address and One Data Byte and Internal Address Usage for the host write operation with internal address.

The three internal address bytes are configurable through the Host Mode register (FLEX_TWI_MMR).

If the client device supports only a 7-bit address, that is, no internal address, IADRSZ must be configured to 0.

The abbreviations listed below are used in the following figures:

S Start
Sr Repeated Start
P Stop
W Write
R Read
A Acknowledge
N Not Acknowledge
DADR Device Address
IADR Internal Address
Figure 63-92. Host Write with One, Two or Three Bytes Internal Address and One Data Byte
Figure 63-93. Host Read with One, Two or Three Bytes Internal Address and One Data Byte